Users Manual V1.0

Publications Number 6500-15B KIM-1 MICROCOMPUTER MODULE USER MANUAL AUGUST 1976 The information in this manual has been reviewed and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. The material in this manual is for informational purposes only and is subject to change without notice. Second Edition © MOS TECHNOLOGY, INC. 1976 "All Rights Reserved" MOS TECHNOLOGY, INC. 950 Rittenhouse Road Norristown, PA 19401 TABLE OF CONTENTS CHAPTER I YOUR KIM-1 MICROCOMPUTER MODULE 1 CHAPTER 2 GETTING STARTED 5 2.1 Parts Complement 5 2.2 A Few Words of Caution! 6 2.3 First Steps 6 2.4 Let's Try a Simple Problem 9 2.5 Adding an Audio Tape Unit 12 2.6 Adding a Teleprinter 17 CHAPTER 3 THE KIM-1 SYSTEM 21 3.1 KIM-1 System Description 21 3.2 KIM-1 Memory Allocation 34 3.3 KIM-1 Operating Programs 40 CHAPTER 4 OPERATING THE KIM-1 SYSTEM 43 4.1 Using the Keyboard and Display 43 4.2 Using the Audio Tape Unit 47 4.3 Using the Teleprinter 50 CHAPTER 5 LET'S TRY A REAL APPLICATION 55 5.1 Defining the Interface 55 5.2 Writing the Program 58 5.3 Entering the Program 65 5.4 Executing the Program 66 5.5 Program Debugging and Modification 67 ii CHAPTER 6 EXPANDING YOUR SYSTEM 71 6.1 Memory and I/O Expansion 71 6.2 Interrupt Vector Management 75 CHAPTER 7 WARRANTY AND SERVICE 79 7.1 In-Warranty Service 79 7.2 Out-of-Warranty Service 80 7.3 Policy on Changes 80 7.4 Shipping Instructions 80 iii LIST OF FIGURES CHAPTER 2 2-1 KIM MODULE 7 2-2 Power Supply Connections 8 2-3 Audio Tape Unit Connections 13 2-4 TTY Connections 18 CHAPTER 3 3-1 KIM-1 Block Diagram 24 3-2 Detailed Block Diagram 25 3-3 Control and Timing 26 3-4 1K x 8 RAM Memory 27 3-5 Keyboard and Display 28 3-6 Keyboard Detail 29 3-7 TTY Interface 30 3-8 Audio Tape Interface 31 3-9 Application Connector 32 3-10 Expansion Connector 33 3-11 Memory Block Diagram 37 3-12 Memory Map 38 3-13 Special Memory Addresses 39 3-14 Flow Chart 41 CHAPTER 5 5-1 Speaker Application 57 5-2 Assembly Language Listing 60 5-3 Square Wave Output 62 5-4 Machine Language Code Table 63 5-5 Key Sequence: Enter Program 65 CHAPTER6 6-1 4K Expansion 73 6-2 65K Expansion 74 6-3 Vector Selection 78 iv LIST OF APPENDiCES APPENDIX A KIM-1 Parts List A-1 APPENDIX B KIM-1 Parts Location B-1 APPENDIX C In Case of Trouble C-1 APPENDIX D Suggested Power Supply D-1 APPENDIX E Audio Tape Format E-1 APPENDIX F Paper Tape Format F-1 APPENDIX G 6502 Characteristics G-1 APPENDIX H 6530 Characteristics H-1 APPENDIX I KIM-1 Program Listings I-1 v CHAPTER 1 YOUR KIM-1 MICROCOMPUTER MODULE Congratulations and welcome to the exciting new world of micro- computers! As the owner of a KIM-1 Microcomputer Module, you now have at your disposal a completely operational, fully tested, and very capable digital computer which incorporates the latest in microprocessor tech- nology offered by MOS Technology, Inc. By selecting the KIM-1 module, you have eliminated all of the problems of constructing and debugging a microcomputer system. Your time is now available for learning the opera- tion of the system and beginning immediately to apply it to your specific areas of interest. In fact, if you will follow a few simple procedures outlined in this manual, you should be able to achieve initial operation of your KIM-1 module within a few minutes after unpacking the shipping container. Your KIM-1 module has been designed to provide you with a choice of operating features. You may choose to operate the system using only the keyboard and display included as part of the module. Next, you may add a low cost audio cassette tape recorder to allow storage and retrieval of your programs. Also, you may add a serial interfaced teleprinter to the system to provide keyboard commands, hard-copy printing, and paper tape read or punch capability. 1 At the heart of your KIM-1 system is an MCS 6502 Microprocessor Array operating in conjunction with two MCS 6530 arrays. Each MCS 6530 provides a total of 1024 bytes of Read-only Memory (ROM) , 64 bytes of Random Access Memory (RAM), 15 Input/Output pins, and an Interval Timer. Stored permanently in the ROM's of the MCS 6530 arrays are the monitor and executive programs devised by NOS Technology, Inc. to control the various operating modes of the KIM-1 system. The KIM-1 system is intended to provide you with a capable micro- computer for use in your real-world" application. Accordingly, the system includes a full 1024 bytes of RAM to provide data and program storage for your application program. In addition, you are provided with 15 bidirectional input/output pins to allow interface control of your specific application. Finally, one of the interval timers included in the system is available for generation of time base signals required by your application. Your KIM-1 system comes to you complete with all components mounted and tested as a system. You need not worry about timing signals (we've included a 1MHz crystal oscillator on the module), interface logic or levels between system components, or interface circuitry to peripheral devices. In fact, you need only apply the indicated power supply voltages to the designated pins to achieve full operation of your KIM-1 system. We recommend that you read all of this manual before applying power to or attempting to operate your KIM-1 module. In the order presented, you will find: Chapter 2 - "hints and kinks" to help you achieve initial system operation Chapter 3 - a more detailed description of the KIM-1 system hardware and software Chapter 4 - operating procedures for all system modes Chapter 5 - an example of a typical application program using all of the features of the KIM-1 system. 2 At some future time, you may find it desirable to expand the KIM-1 system to incorporate more memory, different types of memory, or addi- tional input/output capability. Again, we have tried to make system expansion as simple as possible with all required interface signals brought out to a special connector on the module. Watch for: Chapter 6 - a guide to system expansion for increasing both memory and input/output capability Despite our best efforts to provide you with a fully operable and reliable system, you might encounter some difficulties with your KIM-1 module. If so, refer to: Chapter 7 - some guidance on warranty and service procedures for your KIM-1 module Following the basic text of this manual, you will find a series of Appendices intended to provide you with detailed information on certain specialized subjects of interest to you in understanding the operation of the KIM-1 system. Lastly, since this manual cannot presume to provide all of the technical information on the hardware or programming aspects of the MCS 6502 microprocessor array, we are including with your KIM-1 system two additional manuals for your reference. The Hardware Manual defines the various elements of the system, their electrical and interface characteristics, and the basic system architecture and timing. The Programming Manual provides the detailed information required to write effective programs using the MCS 6502 instruction program set. So much for introductory comments! Now lets get started and see if we can get your KIM-1 Microcomputer Module doing some real work for you. 3 BLANK 4 CHAPTER 2 GETFING STARTED This chapter is intended to guide you through the first important steps in achieving initial operation of your KIM-1 Microcomputer Module. We will ask you to perform certain operations without explanation at this time as to why they are being done. In later sections of this manual, full explanations will be offered for every operating procedure. 2.1 PARTS COMPLEMENT After unpacking the shipping container for your KIM-1, you should have located the following items: 3 Books - KIM-1 Users Manual Hardware Manual Programming Manual 1 Programming Card 1 System Schematic 1 KIM-1 Module 1 Connector (Already mounted on the Module) 1 Hardware Packet 1 Warranty Card You may wish to save the shipping container and packing material should you need to return your KIM-1 module to us at some future date. 5 2.2 A FEW WORDS OF CAUTION WARNING Your KIM-1 module includes a number of MOS integrated circuits. All such circuits include protective devices to prevent damage resulting from inadvertant application of high voltage potentials to the pins of the device. However, normal precautions should be taken to prevent the appli- cation of high voltage static discharges to the pins of an MOS device. Immediately before removal of the packing material from your KIM-1 module, you should develop the following precautionary habits: 1. Discharge any static charge build up on your body by touching a ground connection before touching any part of your KIM-1 module. (This precaution is especially important if you are working in a carpeted area) 2. Be certain that soldering irons or test equipment used on the KIM-1 module are properly grounded and not the source of dangerously high voltage levels. On a different subject, after unpacking your KIM-1 module, you will note the presence of a potentiometer. This adjustment has been set at the factory to insure correct operation of the audio cassette interface circuits. It should never be necessary for you to change the position of this potentiometer. ^------ 2.3 FIRST STEPS After unpacking the KIM-1 module, locate the small hardware packet and install the rubber pads provided. The rubber pads are located at the bottom of the module (see attached sketch) and act both to lift the card off your work surface and to provide mechanical support for the module while you depress keys. 6 Place the module such that the keyboard is to your lower right and observe that two connector locations extend from the module to your left. The connector area on the lower left is referred to as the Application connector (A). You will note that a 44 pin board edge connector is already installed at this location. The connector area to the upper left is for use by you for future system expansion and is referred to as the Expansion connector (E). KIM-1 Module FIGURE 2.1 7 Remove the (A) connector from the module and connect the pins as shown in the sketch. Power Supply Connections FIGURE 2.2 Reinstall the (A) connector making certain that the orientation is correct. Note 1: The +12 volt power supply is required only if you will be using an audio cassette recorder in your system. Note 2: The jumper from pin A-K to Vss (Pin A-1) is essential for system operation. If you expand your system later, this jumper will be removed and we'll tell you what to do to pin A-K. Note 3. If you don't have the proper power supplies already available, you may wish to construct the iow cost version shown with schematic and parts list in Appendix D. In any event, your power supply must be regulated to insure correct system operation and must be capable of supplying the required current levels indicated in the sketch. 8 Now, recheck your connections, turn on your power supplies, and depress [RS] (reset). You should see the LED display digits light as your first check that the system is operational. If not, recheck your hookup or refer to Appendix C (In Case of Trouble). 2.4 LETS TRY A SIMPLE PROGRAM Assuming that you have completed successfully all of the steps thus far, a simple program now can be tried to demonstrate the operation of the system and increase your confidence that everything works properly. We'll be using only the keyboard and display on the module for this example. (In the next two sections we'll worry about the teleprinter and the audio cassette). For our first example, we will add two 8 bit binary numbers together and display the result. We presume that you are familiar with the hex- adecimal representation of numbers and the general rules for binary arith- metic. First check and be sure that the slide switch in the upper right corner of the keyboard is pushed to the left (SST Mode is OFF). Now proceed with the following key sequence: Press Keys See On Display Step # [AD] xxxx xx 1 [0] [0] [0] [2] 0002 xx 2 [DA] 0002 xx 3 [1] [8] 0002 18 4 [+] [A] [5] 0003 A5 5 [+] [0] [0] 0004 00 6 [+] [6] [5] 0005 65 7 [+] [0] [1] 0006 01 8 [+] [8] [5] 0007 85 9 [+] [F] [A] 0008 FA 10 [+] [A] [9] 0009 A9 11 [+] [0] [0] 000A 00 12 [+] [8] [5] 000B 85 13 [+] [F] [B] 000C FB 14 [+] [4] [C] 000D 4C 15 [+] [4] [F] 000E 4F 16 [+] [1] [C] 000F 1C 17 9 What you have just done is entered a program and stored it in the RAM at locations 0002 through QOOF. You should have noticed the purpose of several special keys on your keyboard: [AD] - selects the address entry mode [DA] - selects the data entry mode [+] - increments the address without changing the entry mode [0] to [F] - 16 entry keys defining the hex code for address or data entry You've noticed as well that your display contains 6 digits. The four on the left are used to display the hex code for an address. The two on the right show the hex code for the data stored at the address shown. Therefore, when you pressed [AD] (step 1) and [0] [0] [0] [2] (step 2), you defined the address entry mode, selected the address 0002, and displayed the address 0002 in the four left-most display digits. Incidentally, when we show an "x" in the display chart, we mean that we don't know what will be displayed and we "don't care." Next you pressed [DA] (step 3) followed by [1] [8] (step 4). Here, you have defined the data entry mode and entered the value 18 to be stored at your selected address 0002. Of course, the 18 then was dis- played in the two right-most digits of your display. You remained in the data entry mode but began to press [+] followed by a two digit number (steps 5 to 17). Note that each depression of the [+] key caused the address displayed to increase by one. The hex keys following the [+] key continued to enter the data field of the display. This procedure is merely a convenience when a number of successive address locations are to be filled. If you made any mistakes in pressing the keys, you should have noticed that correcting an error is simply a matter of reentering the data until the correct numbers show on the display. 10 The program you have entered is a simple loop to add two 8 bit binary numbers together and present the result on the display. For a programmer, the listing of the program entered might appear as follows: POINTL = $FA POINTH = $FB START = $1C4F 0000 VALl 0001 VAL2 0002 18 PROG CLC 0003 A5 00 LDA VALl 0005 65 01 ADC VAL2 0007 85 FA STA POINTL 0009 A9 00 LDA #00 000B 85 FB STA POINTH 000D 4C 4F 1C JMP START Stated in simple terms, the program will clear the carry flag (CLC) load VALl into the accumulator (LDA VALl), add with carry VAL2 to the accumulator (ADC VAL2), and store the result in a location POINTL (STA POINTL). A zero value is stored in a location POINTH (LDA #00 and STA POINTH) and the program jumps to a point labelled START (JMP START). This pre-stored program will cause the display to be activated and will cause the address field of your display to show the numbers stored in locations POINTH and POINTL. Note that the result of the addition has already been stored in location POINTL. The hex codes appearing next to the address field of the listing are exactly the numbers you entered to store the program. We refer to these as machine language codes. For example, 4C is the hex code for the JMP instruction of the microprocessor. The next two bytes of the program define 1C4F (START) as the jump address. As yet, you are not able to run the program because you have not yet entered the two variables (VALl and VAL2). Lets try an actual example: Press Keys See On Display Step # [AD] 000F 1C 17A [0] [0] [F] [1] 00F1 xx 17B [DA] [0] [0] 00F1 00 18 [AD] 00F1 00 19 [0] [0] [0] [0] 0000 xx 20 [DA] 0000 02 21 [+] [0] [3] 0001 03 22 [+] [GO] 0002 18 23 11 Steps 17A, 17B, and 18 insure that the binary arithmetic mode is selected. Steps 19 to 21 store the hex value 02 in location 0000 (VAL1). Step 22 stores the hex value 03 in location 0001 (VAL2). Now we are ready to run the program. In step 23, the [GO] key causes the program to execute and the result, 05, appears in the right two digits of the address display. Although the problem appears triviAL, it illustrates the basic principles of entering and executing any program as well as providing a fairly high assurance level that your KIM-1 module is operating properly. You should try one more example using your stored program. Repeat steps 17A to 23 but substitute the value FF for VALl and VAL2 at locations 0000 and 0001. Now when you press the GO key, your display should read: 00FE xx The answer is correct because: FF = 1111 1111 + FF = 1111 1111 FE 1111 1110 Try some more examples if you wish and then let's move on to the rest of the system. 2.5 ADDING A TAPERECORDER In the previous section, you entered and executed a program. If you turn off the power supplies to the system, your program is lost since the memory into which you stored your program is volatile. If you require the same program again, you would have to repower the system and reenter the program as in the previous example. The KIM-1 system is designed to work with an audio cassette tape recorder/player to provide you with a medium for permanent storage of your programs or data. The cassette with recorded data may be reread by the system as often as you wish. In this section, you will connect the audio cassette unit to the system and verify its operation. 12 The recording technique used by the KIM-1 system and the interface circuits provided have been selected to insure trouble-free operation with virtually any type and any quality level audio cassette unit. (We have demonstrated correct operation with a tape unit purchased for less than $20.00 from a local discount outlet). In addition, tapes recorded on one unit may be played back to the system on a different unit if desired. We recommend, of course, that you make use of the best equip- ment and best quality tapes you have available. In selecting a tape unit for use with your KIM-1 system, you should verify that it comes equipped with the following features: 1. An earphone jack to provide a source of recorded tape data to the KIM-1 system. 2. A microphone jack to allow recording of data from the KIM-1 system on the tape. 3. Standard controls for Play, Record, Rewind, and Stop. Note: You should avoid certain miniaturized tape equipment intended for dictating applications where the microphone and speaker are enclosed within the unit and no connections are provided to external jacks. If such equipment is used, you will have to make internal modifications to reach the desired connection points. To connect your tape unit to the KIM-1 module, turn off the power supplies and remove the connector (A) from the module. Add the wires shown in the sketch: Audio Tape Unit Connections FIGURE 2.3 13 Keep the leads as short as possible and avoid running the leads near sources of electrical interference. The connections shown are for typical, portable type units. The Audio Data Out (LO) signal has a level of approx- imately 15 mv. (peak) at pin M. Should you desire to use more expensive and elaborate audio tape equipment, you may prefer to connect the high level (1 volt peak) audio signal available at pin P to the "LINE" input of your equipment. Return the connector (A) to its correct position on the KIM-1 module and turn on the power supplies. To verify the operation of your audio cassette equipment, try the following procedures: 1. Reenter the sample program following the procedures outlined in the previous section (2.4). Try the sample problem again to be sure the system is working correctly. 2. Install a cassette in your tape equipment and REWIND to the limit position. 3. Define the starting and ending address of the program to be stored and assign an identification number (ID) to the program. Press Keys See On Display Step # [AD] xxxx xx 1 [0] [0] [F] [1] 00F1 xx 2 [DA] [0] [0] 00F1 00 3 [AD] 00F1 00 4 [1] [7] [F] [5] 17F5 xx 5 [DA] [0] [0] 17F5 00 6 [+] [0] [0] 17F6 00 7 [+] [1] [0] 17F7 10 8 [+] [0] [0] 17F8 00 9 [+] [0] [1] 17F9 01 10 [AD] 17F9 01 11 [1] [8] [0] [0] 1800 xx 12 You will recall that the program we wish to store on tape was loaded into locations 0000 to OOOF of the memory. Therefore, we define a start- ing address for recording as 0000 and store this in locations 17F5 and 17F6 (Steps 4 to 7). We define an ending address for recording as one more than the last step of our program and stored the value 0010 (= 000F + 1) in locations 17F7 and 17F8 (Steps 8,9). Finally we pick an arbitrary ID as 01 and store this value at location 17F9 (Step 10). Note that before we use the audio cassette unit for recording or playing back, we must put 00 in location 00F1 (Steps 1,2 and 3). 14 The starting address of the tape recording program is 1800. In Steps 11 and 12 we set this address value into the system. If we were to press [GO], the system would proceed to load data on to the magnetic tape. But first, we'd better start the tape! 4. Select the Record/Play mode of the tape recorder. Wait a few seconds for the tape to start moving and now: Press [GO] 5. The display will go dark for a short time and then will relight showing: 0000 xx 6. As soon as the display relights, the recording is finished and you should STOP the tape recorder. Now, you should verify that the recording has taken place correctly. This can be proven by reading the tape you have just recorded. Proceed as follows: 1. Rewind the tape cassette to its starting position. 2. Turn off the system power supplies and then later, turn them back on. This has the effect of destroying your previously stored program which you already have recorded on tape. 3. Prepare the system for reading the tape as follows: Press Keys See On Display Step # [RS] [AD] xxxx xx 1 [0] [0] [F] [1] 00F1 xx 2 [DA] [0] [0] 00F1 00 3 [AD] 00F1 00 4 [1] [7] [F] [9] 17F9 xx 5 [DA] 17F9 xx 6 [0] [1] 17F9 01 7 [AD] 17F9 01 8 [1] [8] [7] [3] 1873 xx 9 [GO] (Dark) 10 15 The KIM-1 system is now looking for tape input data with the ID label 01. Recall that this is the same ID label we assigned when we recorded the program. 4. If your tape unit has a volume control, set the control at approximately the half way point. 5. If your tape unit has a tone control, set the control for maximum treble. 6. Now, turn on the tape using the PLAY mode. The tape will move forward and the system will accept the recorded data. As soon as the data record (ID=01) has been read, the display should relight showing: 0000 xx You may now stop the tape unit. If the display relights and shows; FFFF xx this means that the selected record has been located and read but that an error has occurred during the reading of the data. In this case, press the [RS] key and repeat the read tape procedures from the beginning. If the FFFF still shows on the display, repeat the entire recording and play- back procedures checking each step carefully. If the problem persists, refer to Appendix C, (In Case of Trouble). If the tape continues to run and the display does not relight, this means that the system has been unsuccessful in reading any data back from the tape. In this case, repeat the entire recording and playback proce- dures checking each step carefully. If the problem persists, refer to Appendix C, (In Case of Trouble). 7. Assuming that you have read the tape successfully, you now may verify that the program has been restored to memory by trying a sample problem. (02 + 03 = 05) NOTE: The KIM-1 interface circuits for the audio tape system are designed so that you do not require special test equipment to set up correct operating levels. If you have followed the procedures indicated, the tape system should work without the need of any adjustments by you. 16 2.6 ADDING A TELEPRINTER If you have access to a serial teleprinter, you may add such a unit to the KIM-1 system with very little effort. One of the more commonly available units of this type is the Teletype Nodel 33ASR which we will use for the purposes of illustration in this section. However, if you have available different equipment, you may use the information presented here as a guide to connecting your specific unit. In any case, we recom- mend you follow the directions offered by the equipment manufacturer in his instruction manual to effect the desired wiring and connection options. The KIM-1 provides for a 4 wire interface to the TTY. Specifically, the "20 mA loop" configuration should be used and you should check that your TTY has been wired for this configuration. If not, you may easily change from "60 mA loop" to "20 mA loop" configurations following the manufacturers directions. The KIM-1 has been designed to work properly only with a teleprinter operating in full duplex mode. Check the literature supplied with your teleprinter if you are unsure if your unit is properly configured. You are not restricted to units with specific bit rates (10 CPS for TTY) since the KIM-1 system automatically adjusts for a wide variety of data rates (10CPS, 15CPS, 30CPS, etc.). To connect the TTY to the system, proceed as follows: 1. Turn off system power and remove connector (A) from the module. 2. Add the wires shown in the sketch to connector (A) and to the appropriate connector on the TTY unit. 17 TTY Connections FIGURE 2.4 3. The jumper wire from A-21 to A-V is used to define for the KIM-1 system that a teleprinter will be used as the only input/display device for the system. If you expect to use both TTY and the KIM-1 keyboard/display, you should install the switch shown instead of the jumper. Now, the switch, when open, will allow use of the keyboard and display on the KIM-1 module and, when closed, will select the tele- printer as the input/display device. (of course, you may use a clip-lead instead of the switch if you desire). 4. Be sure pins A-21 and A-V are connected. Reinstall con- nector (A) and return power to the system. Turn-on the TTY. 5. Press the [RS] key on the KIM-1 module then press the [RUB OUT] key on the TTY. This step is most important since the KIM-1 system adjusts automatically to the bit rate of the serial teleprinter and requires this first key depression to establish this rate. 18 If everything is working properly you should immediately observe a message being typed as follows: KIM This is a prompting message telling you that the TTY is on-line and the KIM-1 system is ready to accept commands from the TTY keyboard. Should the prompting message not be typed press the [RS] key on the KIM-1 keyboard and then the [RUB OUT] key on the TTY. If the "KIM" message still is not typed, recheck all connections and the TTY itself and try again. If the problem persists, refer to Appendix C, (In Case of Trouble). 6. Assuming that the TTY is operable, you may now try a simple group of operations to verify correct system operation: Press Keys See On Display Step # KIM xxxx xx 1 0002 0002 2 [SPACE] 0002 xx 3 18. 18. 4 0003 xx 5 A5. A5. 6 0004 xx 7 [LF] 0003 A5 8 [RUB OUT] KIM xxxx xx 9 Step 1 shows the "KIM" prompting message. In Step 2, an address (0002) is selected followed by a space key in Step 3. The address cell 0002 together with the data stored at that location (xx) is printed. Step 4 shows the "modify cell" operation using the [.] key and the hex data keys preceding. Step 5 shows the incrementing to the next address cell (0003) after the [.] key. Note that the modification of cell 0002 also occurs. Steps 6 and 7 show the modification of data in cell 0003 and the incrementing to cell 0004. Step 8 shows the action of the [LF] key in backing up one cell to 0003 where we can see from the printout that the correct data (A5) has been stored at that location. Step 9 shows the reaction to the [RUB OUT] key in resetting the system and producing a new "KIM" prompting message. Note, by the way, that in this example you have repeated a portion of the program entry exactly as you did in Section 2.4 but this time using the TTY. 19 So much for now! If all of the operations have occurred properly, you may be certain that your TTY and KIM-1 module are working together correctly. We will describe in detail all of the other operations pos- sible with the TTY in a later section of the manual. If you have reached this point without problems, you now have completed all of the required system tests and may be confident that the KIM-1 module and your peripheral units are all working correctly. Our next task is to learn more about the KIM-1 system and its operating programs. 20 CHAPTER 3 THE KIM-1 SYSTEM Up to this point you have been engaged in bringing up your KIM-1 system and verifying its correct operation. Now it's time to learn more about the various parts of the KIM-1, how the parts work together as a system, and how the operating programs control the various activities of the system. The diagrams included in this section together with your full sized system schematic will be helpful in understanding the elements of your KIM-1 module. 3.1 KIM-1 SYSTEM DESCRIPTION Figure 3-1 shows a complete block diagram of the KIM-1 system. You should note first the presence of the MCS 6502 Microprocessor Array which acts as the central control element for the system. This unit is an 8 bit microprocessor which communicates with other system elements on three separate buses. First, a 16 bit address bus permits the 6502 to address directly up to 65,536 memory locations in the system. Next, an 8 bit, bidirectional data bus carries data from the 6502 array to any memory location or from any memory location back to the 6502 array. Lastly, a control bus carries various timing and control signals between the 6502 array and other system elements. 21 Associated with the 6502 array is a 1 MHz crystal which operates with an oscillator circuit contained on the 6502 array. This crystal control- led oscillator is the basic timing source from which all other system timing signals are derived. In particular, the þ2 signal generated by the 6502 array and used either alone, or gated with other control signals, is used as the system time base by all other system elements. The 6502 microprocessor is structured to work in conjunction with various types of memory. In the KIM-1 system, all memory may be consid- ered to be of the Read-only (ROM) or Read/Write (RAM) variety. The ROM portion of the memory provides permanent storage for the operating progams essential to the control of the KIM-1 system. You will note the inclusion of two devices, labelled 6530-002 and 6530-003. Each of these devices include a 1024 byte (8 bits per byte) ROM with different portions of the operating program stored permanently in each ROM. RAM type memory is available at three locations in the system. Again, each of the 6530 arrays include 64 bytes of RAM primarily used for temporary data storage in support of the operating program. In addition, a separate 1024 byte RAM is included in the KIM-1 system and provides memory storage for user defined application programs and data. Input/output controls for the system also are included within the 6530 arrays. Each 6530 array provides 15 I/O pins with the microprocessor and operating program defining whether each pin is an input pin or output pin, what data is to appear on the output pins, and reading the data appear ing on input pins. The I/O pins provided on the 6530-002 are dedicated to interfacing with specific elements of the KIM-1 system including the key- board, display, TTY interface circuit, and audio tape interface circuit. The 15 I/O pins on the 6530-003 are brought to a connector and are avail- able for the user to control a specific application. 22 Finally, each 6530 array includes an interval timer capable of count- ing a specific number of system clocks to generate precise timing gates. The exact time interval is preset under program control. The interval timer on the 6530-003 array is available for a user defined application program and is not required by the operating programs. Figure 3-1 shows a major block labelled Control Logic. Included under this category are an address decoder used for generation of chip select signals for the 6530 arrays and the static RAM. Also included is the logic required to debounce the keys for system reset (RS key) and pro- gram stop (ST key). Lastly, special logic is included to allow operation of the system in a "single instruction" mode to facilitate program de- bugging. Figure 3-1 shows the keyboard/display logic interfacing with the I/O pins of the 6530-002. Also shown are the interface circuits for trans- mission of data to and reception of data from the TTY and audio tape units. Figure 3-2 shows the detailed interconnections between the MCS 6502 and the two NCS 6530 arrays. Figure 3-3 shows detailed logic and schematics for the control logic. Figure 3-4 shows a detailed schematic of the static RAM. Figure 3-5 and 3-6 show the detailed schematic of the keyboard and display logic and circuits. Figure 3-7 details the schematic of the TTY interface circuits. Figure 3-8 details the schematic of the audio tape cassette interface circuits. Figures 3-9 and 3-10 provide a summary of all signals available on either the Application connector or the Expansion Connector. The fold-out system schematic shows all of the elements of the system connected together and all signals appearing on the module connectors. You may refer to the Hardware Manual included with your KIM-1 module for additional details on the operating characteristics of the 6502 and 6530 arrays as well as detailed information on system timing. 23 KIM-1 Block Diagram FIGURE 3.1 24 Detailed Block Diagram FIGURE 3.2 25 Control and Timing FIGURE 3.3 26 1Kx8 RAM Memory FIGURE 3.4 27 Keyboard and Display FIGURE 3.5 28 Keyboard Detail FIGURE 3.6 29 TTY Interface FIGURE 3.7 30 Audio Tape Interface FIGURE 3.8 31 | 22 | KB Col D | | 0 | KB Row 1 | | 21 | KB Col A | | Y | KB Col C | | 20 | KB Col E | | X | KB Row 2 | | 19 | KB Col B | | W | KB Col G | | 18 | KB Col F | | V | KB Row 3 | | 17 | KB Row 0 | | U | TTY PTR | | 16 | PB5 | | T | TTY KYBD | | 15 | PB7 | | S | TTY PTR RTRN(+) | | 14 | PA0 | | R | TTY KYBD RTRN(+) | | 13 | PB4 | | p | AUDIO OUT HI | | 12 | PB3 | | N | +12v | | 11 | PB2 | | M | AUDIO OUT LO | | 10 | PB1 | | L | AUDIO IN | | 9 | PB0 | | K | DECODE ENAB | | 8 | PA7 | | J | K7 | | 7 | PA6 | | H | K5 | | 6 | PA5 | | F | K4 | | 5 | PA4 | | E | K3 | | 4 | PA1 | | D | K2 | | 3 | PA2 | | C | K1 | | 2 | PA3 | | B | K0 | | 1 | VSS CND | | A | VCC +5v | Application Connector FIGURE 3.9 32 | 22 | VSS GND | | Z | RAM/R/W | | 21 | VCC +5 | | Y | /þ2 | | 20 | | | X | PLL TEST | | 19 | | | W | /R/W | | 18 | | | V | R/W | | 17 | SST OUT | | U | þ2 | | 16 | K6 | | T | AB15 | | 15 | DB0 | | S | AB14 | | 14 | DB1 | | R | AB13 | | 13 | DB2 | | P | AB12 | | 12 | DB3 | | N | AB11 | | 11 | DB4 | | N | AB10 | | 10 | DB5 | | L | AB9 | | 9 | DB6 | | K | AB8 | | 8 | DB7 | | J | AB7 | | 7 | RST | | H | AB6 | | 6 | NMI | | F | AB5 | | 5 | R0 | | E | AB4 | | 4 | IRQ | | D | AB3 | | 3 | þ1 | | C | AB2 | | 2 | RDY | | B | AB1 | | 1 | SYNC | | A | AB0 | Expansion Connector FIGURE 3.10 33 3.2 KIM-1 MEMORY ALLOCATION It has been stated that the 6502 microprocessor array included in the KIM-1 system is capable of addressing any of 65,536 memory locations. Obviously, we have not included that much memory in your KIM-1 system and this section is intended to detail for you exactly what memory locations are included in the system and where they are located (their exact addresses). Each byte of memory in the system is understood to include 8 bits. Also, you should note that any addressable location in the system may be performing any one of four functions: 1. A ROM byte - read-only memory in which we have stored the operating program. 2. A RAM byte - read/write memory for storage of variable data. 3. An I/O location - these locations include both direction registers which define the I/O pins to be either input pins or output pins, and the actual data buffer locations contain- ing the data to be transmitted on output pins or the data read from input pins. Any I/O location may be viewed as a read/write memory location with a specific address. 4. An Interval Timer location - a series of addresses are reserved for each interval timer in the system. Again, you may write to the timer to define its counting period or read from the timer to determine its exact state. Figure 3-11 shows a block diagram detailing all memory blocks in the KIM-1 system. Figure 3-12 provides a memory map showing all addressable locations included in the system and their relationship to each other. Note also the areas in the memory map indicated as available for expansion. (Section 6 of the manual provides more detail on the subject of memory expansion). Finally, Figure 3-13 provides a complete listing of all impor- tant memory locations and will be referenced frequently by you when writing your application programs. 34 Referring to Figure 3-12, note that the memory map shows a block of 8192 address locations all existing in the lowest address space within the possible 65,536 address locations. This address space is further divided into eight blocks of 1024 locations each. Each 1024 block is further divided into four pages of 256 locations each. The "K" reference defines a specific block of 1024 locations and refers to the "K" number of the address decoder included within the system control logic. The "page" reference defines a specific group of 256 addresses. A total of 32 pages (0 to 31) are included in the 8192 address locations. The hex codes for certain addresses are shown at strategic locations in the memory map. Beginning from the highest address location of the 8192, note that the first 1024 block (K7) is assigned to the ROM of the 6530-002 and the second 1024 block (K6) is assigned to the ROM of the 6530-003. The entire operating program of the KIM-1 system is included in these two blocks. Next in order, a portion of the K5 block is dedicated to the RAM, I/O, and Timer locations of the two 6530 arrays. An expanded view of this address space is shown in Figure 3-12. Note that the RAM addresses for the 6530-002 (Hex 17EC to 17FF) are reserved for use by the operating program and should not appear in a user generated application program. The same is true for the I/O and Timer locations of the 6530-002 which also are reserved for use by the operating programs. The next four blocks in order (K4, K3, K2, Kl) are reserved for additional memory in an expanded system. In Section 6, the methods for adding memory will be discussed. Finally, the lowest 1024 address locations (K0) are assigned to the static RAM included within the KIM-1 system. You should note that within this block, Page 0 and Page 1 have special significance. Page 1 is used as the system stack onto which return addresses and machine status words are pushed as the system responds to interrupts and subroutine commands. Page 0 has significance for certain of the special addressing modes avail- able when programming for the 6502 microprocessor array. 35 Figure 3-12 shows an expanded view of Page 0 and Page 1. Note that 17 addresses (00EF to 00FF) are reserved for use by the operating program and must never appear in the user generated application program. Also, note the comment that a maximum of eight locations may be required on the stack (Page 1) to service operating program interrupts. In summary, the user generated application program may make use of the following areas of memory: 1. All of Page 0 except 00EF to 00FF 2. All of Page 1 (remember that the stack will extend an extra 8 bytes deep to accommodate the operating program). 3. All of Page 2 and Page 3. 4. In Page 23: - All I/O locations from 1700 to 173F - All 64 bytes of RAM from 1780 to l7BF - An additional 44 bytes of RAM from 17c0 to l7EB 36 Memory Block Diagram FIGURE 3.11 37 FIGURE 3.12 Memory Map 38 | ADDRESS | AREA | LABEL | FUNCTION | | | | | | | 00EF | | PCL | Program Counter - Low Order Byte | | 00F0 | | PGH | Program Counter - High Order Byte | | 00F1 | Machine | P | Status Register | | 00F2 | Register | SF | Stack Pointer | | | Storage | | | | 00F3 | Buffer | A | Accumulator | | 00F4 | | Y | Y-Index Register | | 00F5 | | X | X-Index Register | | 1700 | | PAD | 6530-003 A Data Register | | 1701 | Application | PADD | 6530-003 A Data Direction Register | | 1702 | I/O | PBD | 6530-003 B Data Register | | 1703 | | PBDD | 6530-003 B Data Direction Register | | 1704 | | | 6530-003 Interval Timer | | | Interval Timer | | (See Section 1.6 of | | | | | Hardware Manual) | | 170F | | | | | 17F5 | | SAL | Starting Address - Low Order Byte | | 17F6 | Audio Tape | SAH | Starting Address - High Order Byte | | 17F7 | Load & Dump | EAL | Ending Address - Low Order Byte | | 17F8 | | EAH | Ending Address - High Order Byte | | 17F9 | | ID | File Identification Number | | l7FA | | NMIL | NMI Vector - Low Order Byte | | l7FB | | NMIH | NMI Vector - High Order Byte | | l7FC | Interrupt | RSTL | RST Vector - Low Order Byte | | | Vectors | | | | 17FD | | RSTH | RST Vector - High Order Byte | | l7FE | | IRQL | IRQ Vector - Low Order Byte | | 17FF | | IRQH | IRQ Vector - High Order Byte | | 1800 | | DUMPT | Start Address - Audio Tape Dump | | | Audio Tape | | | | 1873 | | LOADT | Start Address - Audio Tape Load | | 1C00 | STOP Key + SST | | Start Address for NMI using KIM | | | | | "Save Nachine" Routine (Load in | | | | | 17FA & 17FB) | | 17F7 | Paper Tape | EAL | Ending Address - Low Order Byte | | 17F8 | Dump (Q) | EAH | Ending Address - High Order Byte | Special Memory Addresses FIGURE 3.13 39 3.3 KIM-1 OPERATING PROGRAMS Figure 3-14 shows a simplified flow chart of the KIM-1 operating programs. This section provides a brief explanation of these programs to assist you in understanding the various operating modes of the system. First, you should note that when power is first applied to your KIM-1 module and the [RS] (reset) key is depressed, control of the system automatically is assumed by the operating program. This is true, as well, for any succeeding depression of the reset key. For each depression of the reset key, the system is initialized. At this time, stack pointer values are set, the I/O configuration is established, and essential status flags are conditioned. Next the program determines whether the system is to respond to TTY inputs or is to operate with the keyboard and display on the KIM-1 module. If the TTY mode has been selected, the program halts and awaits a first key depression from the TTY (the RubOut Key). Upon receipt of this key depression, the program automatically performs a bit rate measurement and stores the correct value for use in receiving and decoding succeeding data transfers from the TTY. Note that this bit rate measurement is per- formed after each depression of the reset key. The program will proceed immediately to a routine causing the prompting message ("KIM") to be typed on the TTY. Now, the program halts at the loop called "Get Character". As each key is depressed on the TTY, the coded data is accepted and analyzed in the routine called "Execute Key". The various keys depressed will cause the program to branch to the appro- priate subroutines required to perform the desired operation. Upon com- pletion of the individual key executions, the program returns to the "Get Key" loop and awaits the next key depression. 40 Flow Chart FIGURE 3.14 41 Exit from the TTY processing loop will occur in response to: 1. A depression of the reset key, 2. A depression of the G key which initiates execution of the application program, or 3. A change in the mode from TTY to Keyhoard/Display. If, after system reset and initialization, the Keyboard/Display mode (KB) is determined to be in effect, the program will proceed dir- ectly to display, and keyboard scan routines. The program will cause the display scan to occur continuously ("Display Cell") until one of the keys on the keyboard is depressed (AK?). Key validation is performed during an additional scan cycle. If the key is truly depressed (not noise), the program proceeds to the routine called "Get Key" in which the exact key depressed is defined. Next, the program moves to the "Execute Key" routine where branches to appropriate execution routines will be per- formed. Finally, after key execution, the program returns to the "Display Cell" routine and waits for the key to be released. When no key is de- pressed, the program returns to the normal "Display Cell" routine and awaits the next key depression. In either the TTY or KB modes, the audio tape load or dump routines may be executed using appropriate commands from the selected keyboards. In either case, completion of the tape load or dump routine allows the program to return to the "Start" position which will, as usual, activate the KIM-1 display or cause the "KIM" prompting message on the TTY. You should note the use of the Stop key to activate the non-maskable interrupt input (NMI) of the 6502 microprocessor array. Depression of this key causes an unconditional termination of program execution, a saving of machine status registers on the stack, and a return to the control of the operating program. A second interrupt input is available and referred to as IRQ. This interrupt may be defined by the user and will cause the program to jump to any location defined by the user in his program. 42 CHAPTER 4 OPERATING THE KIM-1 SYSTEM Now that you have a better idea of what is included in your KIM-1 system and how it operates, its time to provide you with detailed pro- cedures for all of the operations you can perform with the system. We will separate our operating procedures into three areas giving specific direction for the use of the KIM-1 keyboard and display, the audio tape recorder, and the serial teleprinter (TTY). 4.1 USING THE KIM KEYBOARD AND DISPLAY A brief study of your keyboard shows a total of 23 keys and one slide switch. First, let's list the purpose of each key: [0] to [F] - Sixteen keys used to define the hex code of address or data [AD] - selects the address entry mode [DA] - selects the data entry mode [+] - increments the address by +1 but does not change the entry mode [PC] - recalls the address stored in the Program Counter locations (PCH, PCL) to the display [RS] - causes a total system reset and a return to the control of the operating program [GO] - causes program execution to begin starting at the address shown on the display [ST] - terminates the execution of a program and causes a return to the control of the operating program 43 You have seen in an earlier chapter that the six digit display in- cludes a four digit display of an address (left four digits) and a two digit display of data (right two digits). Using only the KIM-1 keyboard and display, you may perform any of the following operations: 1. Select an Address Press AD followed by any four of the hex entry keys. The address selected will appear on the display. If an entry error is made, just continue to enter the correct hex keys until the desired address shows on the display. Regardless of what address is selected, the data field of the display will show the data stored at that address. 2. Modify Data After selecting the proper address, press [DA] followed by two hex entry keys which correctly define the data to be stored at the selected address. The data entered will appear in the data field of the display to indicate that the desired code has already been entered. Note that it is possible for you to select an address of a ROM memory cell or even the address of a memory cell that does not exist in your system. In these cases, you will not be able to change the data display since it is clearly not possible for the system to write data to a ROM cell or a non-existent memory location. 3. Increment the Address By pressing the [+] key the address displayed is auto- matically increased by +1. Of course, the data stored at the new address will appear on the display. This operation is useful when a number of successive address locations must be read or modified. Note that the use of the [+] key will not change the entry mode. If you had previously pressed the [AD] key, you remain in the address entry mode and a previous depression of the [DA] means you remain in the data entry mode. 44 4. Recall Program Counter Whenever the NMI interrupt pin of the 6502 microprocessor array is activated, the program execution in progress will halt and the internal registers of the 6502 are saved in special memory locations before the control of the system is returned to the operating program. In the KIM-1 system, the NMI interrupt may occur in response to a depression of the [ST] key (stop) or, when operating in the Single Step mode, after each program instruction is executed following the depression of the GO key. The [PC] key allows you automatically to recall the value of the Program Counter at the time an interrupt occurred. You may have performed a variety of operations since the interrupt such as inspecting the contents of various machine registers stored at specific memory locations. However, when you press the [PC] key, the contents of the Program Counter at the time ot the interrupt are recalled to the address field of the display. You now may continue program execution from that point by pressing the [GO] key. 5. Execute a Program Select the starting address of the desired program. Now, press the [GO] key and program execution will commence starting with the address appearing on the display. 6. Terminate a Program The [ST] key is provided to allow termination of program execution. As mentioned earlier, the [ST] key activates the NMI interrupt input of the 6502 microprocessor array. Note: The [ST] key will operate correctly only if you store the correct interrupt vector at locations 17FA and 17FB. For most of your work with the KIM-1 system, you should store the address 1C00 in these locations as follows: [AD] [1] [7] [F] [A] [DA] [0] [0] [+] [1] [C] 45 Now, when the NMI interrupt occurs, the program will return to location 1C00 and will proceed to save all machine registers before returning control to the operating program. You should remember to define the NMI vector each time the power to the system has been interrupted. A failure of the system to react to the [ST] key means you have forgotten to define the NMI vector. 7. Single Step Program Execution In the process of debugging a new program, you will find the single step execution mode helpful. To operate in this mode, move the SST slide switch to the ON position (to your right). Now, depress the [GO] key for each desired execution of a program step. The display will show the address and data for the next instruction to be executed. Note that in the course of stepping through a program, certain addresses will appear to be skipped. A program instruction will occupy one, two, or three bytes of memory depending upon the type of instruction. In single instruction mode, all of the bytes involved in the execution of the instruction are accessed and the program will halt only on the first byte of each successive instruction. Note: SST mode also makes use of the NMI interrupt of the 6502 microprocessor array. Again, the NMI vector must be defined as described in (6) above if the SST mode is to work correctly. This covers all of the standard operations you may perform from the KIM-1 keyboard. Using combinations of the operations described, you may wish to perform certain specialized tasks as follows: 1. Define the IRQ Vector You will recall that a separate interrupt input labelled IRQ is available as an input to the 6502 microprocessor array. If you wish to use this feature, you should enter the address to which the program will jump. The IRQ vector is stored in locations 17FE and 17FF. 2. Interrogate Machine Status We have mentioned that after an NMI interrupt in response to the ST key or during the SST mode, the contents of various machine registers are stored in specific memory locations. If you wish to inspect these locations, their addresses are: 46 00EF = PCL 00F0 = PCH 00F1 = Status Register (P) 00F2 = Stack Pointer (SP) 00F3 = Accumulator (A) 00F4 = Y Index Register 00F5 = X Index Register 4.2 USING THE AUDIO TAPE RECORDER There are two basic operations possible when working with your audio tape system. You may transfer data from the KIM-1 memory and record it on tape. Or, you may read back a previously recorded tape, transferring the data on tape into the KIM-1 memory. Recording on Audio Tape The procedure for recording on audio tape requires that you perform the following steps: 1. Clear decimal mode by entering 00 in location 00F1. Define an identification number (ID) for the data block you are about to record. This two digit number is loaded into address 17F9. Don't use ID = 00 or ID = FF. 2. Define the starting address of the data block to be transferred. This address is to be loaded into locations: 17F5 = Starting Address Low (SAL) 17F6 = Starting Address High (SAH) 3. Define the ending address as one greater than the last address in the data block to be recorded. The ending address is to be loaded into locations: 17F7 = End Address Low (EAL) 17F8 - End Address High (EAH) As an example, assume you wish to record a data block from address 0200 up to and including address 03FF. (All of Pages 2 and 3). You wish to assign an ID number of 06 to this block. Using the KIM-1 keyboard, you should load the data shown into the addresses indicated so that: 00F1 = 00 (Clear Decimal Mode) 17F5 = 00 (SAL) 17F6 = 02 (SAH) 17F7 = 00 (EAL) \ > = 03FF + 1 17F8 = 04 (EAH) / 17F9 = 06 (ID) 47 Note that the ending address must be greater than the starting address for proper operation. 4. Assuming that you are using a new cassette on which no data has been stored previously, insert the cassette in the unit and rewind the tape to its start position. 5. Select the starting address of the tape record program. This address is 1800. 6. Select the Play/Record mode of the audio unit and allow several seconds for the tape to begin to move. 7. Press the [GO] key and the recording process will begin. The display will be blanked for a period and then will relight showing 0000 xx. This means that the data block selected has been recorded. 8. You may now stop the tape or allow some additional seconds of blank tape and then stop the unit. Loading Data From Audio Tape The procedure for loading data from an audio tape into the KIM-1 memory requires that you perform the following steps: 1. Clear decimal mode by entering 00 in location 00F1. Define the ID number of the data block to be loaded from tape. The ID number is loaded into address 17F9. 2. Select the starting address of the Tape Load program. This address is l873 HEX. 3. Press the [GO] key. The KIM-1 system is now waiting for the appearance of data from the tape unit. 4. Load the cassette and, presuming you do not know where on the tape the data block is recorded, rewind the tape to its starting position. Check the volume control setting. 5. Start the audio tape unit in its Play mode and observe' that the tape begins to move. 6. Wait for the KIM-1 display to relight showing 0000 xx. This means the data block has been loaded successfully from the tape into the KIM-1 memory. If the display relights with FFFF xx, the correct data block has been found but there has been an error detected during the read operation. If the tape continues to run and the display never relights, the system has not been successful in finding the data block with the specific ID number you requested. 48 7. If in step (1), you had selected an ID = 00, the ID number recorded on the tape will be ignored and the system will read the first valid data block encountered on the tape. The data read from the tape will be loaded into memory address as specified on the tape. 8. If, in step (1), you had selected an ID = FF, the ID number recorded on the tape will be ignored and the sys- tem will read the first valid data block encountered on the tape. In addition, the data block will be loaded into successive memory locations beginning at the address specified in locations 17F5 and 17F6 (SAL, SAH) instead of the locations specified on the tape. Special Operations with Audio Tape The KIM-1 system causes data to be recorded on audio tape with a specific format as detailed in Appendix E. Each recorded data block is preceeded by a group of synchronizing characters together with an identi- fication code to define the specific block. Data blocks may be of arbi- trary length. With a little care, there is no reason for you not to include a number of recorded data blocks on the same tape. If you are recording blocks in sequence and have not rewound the tape between blocks, you need only specify the parameters of each new block (ID, SAL, SAH, EAH, EAL) and proceed with recording the new block. If the tape has been rewound, you will need to know the ID number of the last recorded~data block. Rewind the tape to its starting point and set up the parameters required to read the last recorded data block. After reading this block, stop the tape and you may now proceed to add a new block or blocks to the tape. If you wish, you may add voice messages between the recorded data blocks on the tape. The KIM-1 system will ignore these audio messages when the tape is read back. Of course, you will need to install an earphone or speaker in parallel with the KIM-1 audio tape data input pin in order to hear the voice messages. We do not recommend that you attempt to record data blocks in areas of the tape which have been used previously for recorded data. Variations in tape speed and block lengths can result in overlapping of recorded data which may be read incorrectly by the KIM-1 system. 49 4.3 USING A SERIAL TELEPRINTER The addition of a serial teleprinter (such as the Teletype Model 33ASR) to work with the KIM-1 system permits a variety of special opera- tions to be performed. In all cases, you define desired operations by depressing the proper keys while simultaneously producing a hard-copy printed record of each operation. If your teleprinter is equipped with a paper tape reader/punch, you may generate or read paper tapes using the KIM-1 system. Using the serial teleprinter, you may perform the following operations: Select an Address Type four hex keys (0 to F) to define the desired address. Next, press the [SPACE] bar. The printer will respond showing the address code selected followed by a two digit hex code for data stored at the selected address location: Type: 1234 [SPACE] Printer Responds: 1234 AF showing that the data AF is stored at location 1234. Modify Data Select an address as in the previous section. Now type two hex characters to define the data to be stored at that address. Next type the [.] key to authorize the modification of data at the selected address: Type: 1234 [SPACE] Printer Responds: 1234 AF Type: 6D [.] Printer Responds: 1235 B7 Note that the selected address (1234) has been modified and the system increments automatically to the next address (1235). Note: Leading zero's need not be entered for either address or data fields: For example: EF [SPACE] selects address 00EF E [SPACE] selects address 000E A [.] enters data 0A [.] enters data 00 (etc.) 50 Step to Next Address Type [CR] to step to the next address without modifying the current address: See Printed: 1234 AF Type: [CR] Printer Responds: 1235 B7 Type: [CR] Printer Responds: 1236 C8 (etc.) Step to Preceeding Address Type [LF] to step back to the preceeding address: See Printed: 1234 AF Type: [LF] Printer Responds: 1233 9D Type: [LF] Printer Responds: 1232 8E (etc.) Abort Current Operation Type [RUB OUT] to terminate the current operation. The prompting message will be printed ("KIM") indicating that a new operation may proceed: Type: 1264 [RUB OUT] Printer Responds: KIM xxxx xx Type: 1234 [SPACE] Printer Responds: 1234 AF In the example, the [RUB OUT] key is used to correct an erroneous address selection. Note: The [RUB OUT] key must be depressed after each depression of the KIM-1 reset key in order to allow the operating program to define the serial bit rate for the tele- printer. 51 Load Paper Tape Paper Tapes suitable for use with the KIM-1 system are generated using the format shown in Appendix F. To read such a tape into the KIM-1 system, proceed as follows: 1. Load the punched paper tape on to the tape mechanism 2. Type [L] 3. Activate the paper tape reader The paper tape will advance and data will be loaded into addresses as specified on the tape. A printed copy of the data read will be generated simultaneously with the reading of the paper tape. Check-sums are generated during the reading of the paper tape and are compared to check-sums already contained on the tape. A check- sum error will cause an error message to appear in the printed copy. Punch Paper Tape The KIM-1 system can be used to punch paper tapes having the format described in Appendix F. The procedures for generating these tapes is as follows: 1. Define the starting address and ending address of the data block to be punched on the paper tape. 2. Load blank paper tape on the punch unit and activate the punch. Type: [1] [7] [F] [7] [SPACE] See Printed: 17F7 xx Type: [F] [F] [.] See Printed: 17F8 xx Type: [0] [3] [.] See Printed: 17F9 xx Type: [2] [0] [0] [SPACE] See Printed: 0200 xx 52 You have now loaded the ending address (03FF) into address locations 17F7 (EAL) and 17F8 (EAH). The starting address (0200) is selected as shown. 3. Now type [Q] The paper tape will advance and punching of the data will proceed. Simultaneously, a printed record of the data will be typed. List Program A printed record of the contents of the KIM-1 memory may be typed. The procedure is the same as for punching paper tape except that the punch mechanism is not activated. Execute Program To initiate execution of a program using the TTY keyboard, the following procedures should be followed: 1. Enter the starting address of the program 2. Type [G] For example, to begin program execution from address location 0200: Type: [2] [0] [0] [SPACE] See Printed: 0200 xx Type: [G] Program execution begins from location 0200 and will continue until the [ST] or [RS] keys of the KIM-1 module are depressed. The single step feature may be employed while in the TTY mode. 53 BLANK 54 CHAPTER 5 LET'S TRY A REAL APPLICATION It is not practical in this manual to describe every possible application or Programming technique. However, now that you have become familiar with the basic elements and operating procedures of the KIM-1 system, this section will show you how to apply what you have learned in a simple but realistic application example. Our example will involve the generation of a variable frequency square wave which will be connected to a speaker to produce an audible tone. The frequency of the tone will be selected using a set of seven toggle switches. We will proceed through the example by defining the in- terface, writing and entering the program, and executing the program. Finally, we will study a series of program debugging techniques which will be useful to you for any new program you may write. 5.1 DEFINING THE INTERFACE You will recall that a group of 15 I/O pins are brought to the Application connector from the 6530-003 array. The logic and circuit details concerning these I/O pins are described in Appendix H and in Section 1.6 of the Hardware Manual ("Peripheral Interface/Memory Device - - MCS 6530"). 55 For our application example we will use eight of these I/O pins. One pin (PA0) will be used as an output line to supply a square wave to a driver circuit and speaker. The other seven I/O pins (PA1 to PA7) are defined as input points with a SPST toggle switch connected to each. Figure 5-1 shows the circuit configuration for this example. Note that the remaining seven I/O pins (the PB port) are not used for this problem. For the switches connected to the input pins, we would like the sense of the switch to be defined as a logic "0" when open and a logic "1" when closed. By connecting the switches to ground, we are producing exactly the opposite sense and must remember to complement the switch states with software when we write our program. Also, we must define now that the switch at PA1 is to be the LSB (least significant bit) and the switch at PA7 is to be the MSB (most significant bit) of the seven bit binary word formed by all seven switches. In this way, the state of the switches can define a binary number from zero (all switches open) to 127_DEC (all switches closed). 56 Speaker Application FIGURE 5.1 57 5.2 WRITING THE PROGRAM Having defined the interface for our application, we may proceed now to write our program. The effort proceeds in four stages: 1. Generate a flow chart 2. Generate assembly language code 3. Analyze the program 4. Generate machine language code 58 Briefly, our flow chart shows a first step of system initialization. During this step, we must define the I/O configuration of the system in that pin PA0 becomes the output to the speaker and that pins PA1 to PA7 become inputs from the seven switches. After initialization, a loop is set up which begins by inverting the state of PA0 (Toggle PA0). Next, the state of the switches is read and the data is complemented to produce the correct "sense" from the switches. The value so read is used to define a delay before returning to the start of the loop and again toggling the state of PA0. A little thought will show that this loop will produce a square wave with a frequency determined by the setting of the seven switches. Assembly Language Program Our next task is to convert the simple flow chart into a program. The program is first written in "Assembly Language". You should refer to your Programming Manual to become familiar with all of the pos- sible 6502 instructions (especially see Appendix B; Instruction Summary). Figure 5-2 shows the application example programmed in assembly language. 59 | | | | MACHINE | | | LABEL | OPCODE | OPERAND | CYCLES | COMMENTS | | INIT | LDA | #$01 | 2 | Define I/O 0=Input 1=Output | | | STA | PADD | 4 | PADD PORT A DATA DIRECTION REG. | | START | INC | PAD | 6 | Toggle PA0, PA1-PA7 Inputs | | | | | | not affected | | READ | LDA | PAD | 4 | READ switches into accumulator | | | EOR | #$FF | 2 | Complement switch value | | | LSR | A | 2 | Shift Accumulator 1 bit to right | | | TAX | | 2 | Transfer final count into X-Index | | DELAY | DEX | | 2 | Delay by an amount specified | | | BPL | DELAY | 3,2 | By the count in the X-Index | | | BMI | START | 3 | Go To START | | PADD | =$1701 | | | Define absolute address of | | | | | | Data Direction Reg. A | | PAD | =$1700 | | | Define absolute address of | | | | | | Data Reg. A | Assembly Language Listing FIGURE 5.2 60 You will note that each line of the program is broken into several fields: - A label field permitting you to assign a "name" to a specific location in the program. - An Operation Code field (Op Code) in which the exact instruction to be executed is defined. - An Operand Field where the exact data required by the instruction is defined together with certain symbols defining addressing modes or data formats. Symbols encountered generally in MOS Technology, Inc. manuals are: # Immediate Addressing $ Hex Code @ Octal Code % Binary Code ' ASCII literal = Equates a label to a value - A Machine Cycle field defining the total number of machine cycles required to execute an instruction. (This information is derived from Appendix B of the Programming Manual). - A Comment Field where the programmer may define the intent of specific program steps. Program Analysis The inclusion of the "machine cycle" information of the program chart (Figure 5-2) allows us to analyze the exact timing relationships involved in our program example. Note that the KIM-1 system operates from a fixed frequency (1 MHz) oscillator with each machine cycle being 1us. Therefore, an instruction like "INC PAD" which requires 6 machine cycles will be executed in a 6µs period. 61 By counting the total machine cycles occurring between each toggle of PAØ, an equation for the square wave frequency can be developed. The actual frequency is determined by the position of the seven switches, the number of machine cycles between each toggle of PAØ, and the basic clock rate (1 MHz) of the KIM-1 system. Figure 5-3 shows the waveform of the PAØ square wave and the derived equations for computing the exact frequency. Square Wave Output FIGURE 5.3 62 Machine Language Coding Our next problem is to convert our assembly language program into a program written in "machine language". The quickest and most foolproof method for accomplishing this conversion is by using the MOS Technology, Inc. Assembler (available for use on the time share services of United Computing Systems, Inc.). If you choose not to use this method, you will need to convert your source program to machine code using "paper-and-pencil" techniques. You should proceed by constructing a table similar to that shown in Figure 5-4. | | INSTRUCTION || SOURCE CODE | | ADDRESS | BYTE 1 | BYTE 2 | BYTE 3 || LABEL OP CODE OPERAND | | 0200 | A9 | 01 | || INIT LDA #$01 | | 0202 | 8D | 01 | 17 || STA PADD | | 0205 | EE | 17 | || START INC PAD | | 0208 | AD | 17 | || READ LDA PAD | | 020B | 49 | FF | || EOR #$FF | | 020D | 4A | | || LSR A | | 020E | AA | | || TAX | | 020F | CA | | || DELAY DEX | | 0210 | 10 | F0 | || BPL DELAY | | 0212 | 30 | F1 | || BMI START | | 0214 | | | || | Machine Language Code Table FIGURE 5.4 The source code contained in your assembly language program (Figure 5-2) is entered into the table first. A column is provided to allow you to define the specific address at which an instruction is located. The Instruction column provides space for defining one, two, or three byte instructions. (Please refer to Appendix B of the Program- ming Manual or to your Programming Card for specific Op Codes). 63 As an example, the first source instruction is LDA #$01 which, when translated, means load the accumulator with the byte stored in the next program location (hex 01). This is the "immediate" addressing mode defined by the "#" symbol. The Op Code for LDA# is A9. This value is entered in the first column under the heading, Instruction. The next column contains the hex 01 value defined by the source state- ment. The initial address for the program is inserted in the "Address" column as 0200 (an arbitrary selection). The total instruction LDA #$01 now occupies address locations 0200 and 0201. The next available address is 0202 which is inserted in the "Address" column for the next source instruction. In this manner, you will proceed through all of the source statements decoding each and entering one, two, or three bytes of machine code as required in the "Instruction" column. The "Address" column will contain the address of the first byte of machine code (the Op Code) for each source statement. In cases where the operand of the source statement is a symbol, the address to which the symbol has been equated should be filled in as the proper machine code. For example, the source statement "INC PAD" requires the incrementing of data stored at a location "PAD" defined in our assembly programs to have the address: PAD = 1700. Therefore, the address 1700 is entered as the second and third bytes of the source statement "INC PAD". (See Figure 5-4). Note also that when entering an address, such as 1700, the low order byte (00) is entered first and immediately after the Op Code and the high order byte (17) is entered next as the third byte of the instruction. When dealing with branch instructions (BPL, BMI, etc.), you will need to calculate the exact value of the offset which may be either positive (branch forward) or negative (branch backward). You should refer to Section 4.1.1 of the Programming Manual to explore "Basic Concept of Relative Branching." As an example, the source statement "BMI START" (See Figures 5-2 and 5-4) requires a branch backward by (-15) locations to the address labelled "START" (from address 0213 backward to 0205 inclusive). 64 (The 2's complement of the -15 displacement is F1 HEX which you should insert at location 0212). Had the branch been to a forward location the positive value of the offset would be inserted rather than the 2's complement value. 5.3 ENTERING THE PROGRAM With the program now reduced to machine language code, you may enter the program address and data codes listed in Figure 5-4 following the procedures detailed in Section 2.4. The procedure for entering the program is as follows: Press Keys See On Display [AD] [0] [2] [0] [0] 0200 xx [DA] [A] [9] 0200 A9 [+] [0] [1] 0201 01 [+] [8] [D] 0202 8D [+] [0] [1] 0203 01 [+] [1] [7] 0204 17 [+] [E] [E] 0205 EE [+] [0] [0] 0206 00 [+] [1] [7] 0207 17 [+] [A] [D] 0208 AD [+] [0] [0] 0209 00 [+] [1] [7] 020A 17 [+] [4] [9] 020B 49 [+] [F] [F] 020C FF [+] [4] [A] 020D 4A [+] [A] [A] 020E AA [+] [C] [A] 020F CA [+] [1] [C] 0210 1C [+] [F] [D] 0211 FD [+] [3] [0] 0212 30 [+] [F] [1] 0213 F1 Key Sequences: Enter Program FIGURE 5.5 65 5.4 EXECUTING THE PROGRAM With the program entered, you may proceed to program execution. First, if the NMI vector has not been defined previously, enter the vector as follows: Press Keys See Displayed [AD] [1] [7] [F] [A] 17FA xx [DA] [0] [0] 17FA 00 [+] [1] [C] 17fb 1C This procedure insures that the [ST] key will be effective in tenninating the program. Now, select the starting address of your program (0200) and begin execution as follows: Press Keys See Displayed [AD] [0] [2] [0] [0] 0200 xx [GO] (DARK) The program will now execute. If your seven selector switches all are open, you will probably hear no sound from the speaker because the square wave frequency is too high. If all selector switches are closed, you will hear in the speaker the lowest frequency that can be generated with the program as currently written. You may experiment with other combinations of switch settings to hear a variety of tones from the speaker. Depression of the [ST] key will cause the program execution to stop (the tone will terminate) and the KIM-1 display will relight. The display will show the address and data for the next instruction to be executed (probably 020F or 0210 since this is the delay loop where the program spends most of its running time). 66 5.5 PROGRAM DEBUGGING AND MODIFICATION If your program did not execute correctly, you would follow a debugging procedure involving the following steps: Step 1: List the Program First make sure you have entered the program steps correctly. Select the starting address ([AD] [0] [2] [0] [0]) and observe that the correct data (A9) is displayed. Now, using the [+] key, step through the remaining program locations check- ing for the correct data stored in each location. Step 2: Single Step the Program Follow the procedures listed in Section 5-4 for program execution but before depressing the [GO] key, place the SST slide switch in the ON position. Now, press the [GO] key and the first instruction will be executed. The display will relight indicating that the operating program is again in control of the system. The address displayed will be the address of the first byte of the next instruction to be executed. You may press the [GO] key again to execute the next instruction or you may choose to investigate changes in the contents of machine registers stored in selected memory locations (See Figure 3-13). The procedure detailed in Figure 5-6 gives a good indication of the various operations you may wish to perform in the SST mode. Step 3: Check the I/O Operations If program entry has been verified and program execution in the SST mode appears to be normal, you may wish to verify the correct operation of your specific I/O configuration. You should recall that writing to or reading from any I/O port is the same as reading from or writing to any other memory location in the system. Therefore, if you select the address of an I/O port, the KIM-1 display will show you the hex code for the data being read from that address and thus, directly indicate the state of each I/O pin in the port. For example, the 67 address of the I/O port used for your sample program is 1700. Press [AD] [1] [7] [0] [0] and the display will show the hex code corresponding to the settings of your selector switches. If you change the positions of your selector switches, you will see the hex code change in the data field of the display. Now, leave the same address (1700) selected and press the [DA] key. If you press any of the hex keys [0] to [F] you will write the data to the I/O port (1700). Since seven of the pins of this I/O port are defined as inputs, only one (PA0) will act as an output and will respond to the data entered by you from the keyboard. Try alternating rapidly between the [0] and [1] keys and you should hear clicking in the speaker indicating that you are successfully toggling the PA0 pin. This concept of using the KIM-1 keyboard and display to exercise and verify the operation of I/O ports is a generally useful technique for debugging the hardware portions of most specific applications. 68 Press Keys See On Display Comments [AD] [0] [2] [0] [0] 0200 A9 Select first instruction address | SST |X| |ON 0200 A9 Set SST to ON; All selector switches open [GO] 0202 8D Accumulator now loaded with $01 [GO] 0205 EE PADD now loaded [GO] 0208 AD PA0 now toggled [GO] 020B 49 Switch values (PA1-PA7) now [GO] loaded [GO] 020D 4A Accumulator now complemented [GO] 020E AA Accumulator now right shifted 1 Bit [AD] [0] [0] [F] [3] 00F3 xx Display Accu [+] 00F4 xx Display Y - INDEX [+] 00F5 00 Display X - INDEX [PC] 020E AA Restore PC (TAX will execute next) [GO] 020F CA Accumulator now loaded in X-INDEX [AD] [0] [0] [F] [3] 00F3 00 Display Accumulator [+] 00F4 xx Display Y-INDEX [+] 00F5 00 Display X-INDEX (A=0->X) [PC] 020F CA Restore PC [GO] 0210 10 DEX now completed [AD] [0] [0] [F] [5] 00F5 FF Display X-INDEX (X<0) [PC] 0210 10 Restore PC [GO] 0212 30 No branch (Result of DEX not positive) [GO] 0205 EE Branch (Result of DEX is negative). SST Mode: Sample Operation FIGURE 5.6 69 BLANK 70 CHAPTER 6 EXPANDING YOUR SYSTEM In earlier sections you have learned that the MCS 6502 Microprocessor Array is capable of directly addressing up to 65,536 locations (bytes) of memory. (Usually abbreviated to 65K where "1K" for the remainder of this section is to mean 1024 memory locations). In this section, we will discuss first the techniques for adding memory or I/O locations to the system and next, the proper handling of interrupt vectors in an expanded system. 6.1 MEMORY AND I/O EXPANSION In the KIM-1 system, the management of input/output data is handled exactly the same as transfers to or from any other memory location in the system. There are no instructions dealing specifically with input/output transfers. Instead, transfer of data is accomplished by reading from or writing to registers connected to the data bus and to I/O pins in specific I/O interface devices (such as the 6530 array). These registers have a specific address in the system just as does any other memory location. Therefore, when we speak of expanding the memory of the KIM-1 system, we are defining the methods for expanding both the real memory (RAM, ROM, PROM, etc.) as well as the I/O ports since they are both treated exactly alike as far as address assignments are concerned. 71 The first and most easilly implemented memory expansion is the addition of up to 4K of memory space. You will recall that the lowest 8K memory locations are defined by an address decoder included on the KIM-1 module, (Device U4 on the schematic). The eight outputs of this decoder (KØ to K7) each define a 1K block of addresses in the lowest 8K of the memory map. Three of the outputs (K5, K6, K7) are used to select ROM, RAM, I/O and Timer locations on the two 6530 arrays while a fourth (K0) is used to select the 1024 locations of the static RAM memory. The remaining four outputs (K1, K2, K3, K4) are not used on the KIM-1 module but instead, are brought out to the Expansion connector for use as chip selects for memory or I/O additions. Figure 6-1 shows the proper method for deriving the four chip select signals for the additional 4K of memory. Note that one of input pins of the decoder (D) was brought out to the Application Connector. It was this pin which we asked you to connect to ground in Chapter 2 of this manual. As long as this point remains connected to ground, the decoder will always select the lowest 8K addresses of the memory field regardless of the state of AB13, AB14, and AB15. If you wish to expand the memory and I/O address space beyond the lower 8K addresses, you must arrange to de-select the lower 8K memory block while selecting some other 8K block. One suggested method for expanding beyond the lower 8K space is shown in Figure 6-2. Note that the three high order address bits (AB13, AB14, AB15) are connected to a decoder. The eight outputs of the decoder act to divide the total 65K memory space into eight blocks of 8K each (8K0, 8K1, etc.). Now, the 8K0 output may be returned as the fourth inpur (D) to the de- coder (U4) on the KIM-1 module causing the proper selection and de-selec- tion of this block within the total address space. The remaining seven outputs (8K1 to 8K7) may be used to select and de-select the additional decoders shown in Figure 6-2. You need add only as many decoders (one for each 8K block of memory) as you need for your desired memory expansion. 72 A word of caution is in order when you decide to add memory to your system. You have noticed the inclusion of the line receivers for the AB10, AB11, and AB12 signals, (See Figure 6-2). These devices are included because of loading limitations placed on the address bus lines of the 6502 array (Each such line is capable of driving one standard TTL load and l3Opf of capacity. See Appendix G). 4K Expansion FIGURE 6.1 73 65K Expansion FIGURE 6.2 74 Before deciding how to expand your system, we recommend a careful study of all of the loading limitations of the KIM-1 signals since almost certainly you will require additional buffering circuits if correct operation is to be achieved. 6.2 INTERRUPT VECTOR MANAGEMENT We have referred several times in earlier sections to the interrupt features of the 6502 Microprocessor Array. We suggest now a careful reading of Section 9 of the Programming Manual for the subject "Reset and Interrupt Considerations". In summary, there are three possible types of interrupt: Reset, NMI, and IRQ. Each will occur in response to an activation of one of the three pins of the 6502 array (RST, NMI, IRQ). In response to these inputs, the 6502 array will fetch the data stored at a specific pair of addresses and load the data fetched into the program counter. The addresses are hardware determined and not under the control of the programmer. The specific addresses for each type of interrupt are: FFFA, FFFB - NMI Vector FFFC, FFFD - RST Vector FFFE, FFFF - IRQ Vector You will note that these addresses define the highest six locations in the 65K memory map. In the KIM-1 system, three address bits (AB13, AB14, ABl5) are not decoded at all. Therefore, when the 6502 array generates a fetch from FFFC and FFFD in response to a RST input, these addresses will be read as 1FFC and 1FFD and the reset vector will be fetched from these locations. You now see that all interrupt vectors will be fetched from the top 6 locations of the lowest 8K block of memory which is the only memory block decoded for the unexpanded KIM-1 system. 75 It is typical in any system to store the interrupt vectors in ROM so that they are immediately available after power-on. However, it is desirable that for the NMI and IRQ interrupts, the programmer be allowed to define as a variable the exact vector to which these interrupts will direct the system. Accordingly, the NMI and IRQ vector locations contain an indirect jump instruction referencing a RAM location into which the programmer will store the specific vector for the two types of interrupt. In the KIM-1 system, locations 17FA and 17FB contain the actual NMI vector and 17FE with 17FF contain the actual IRQ vector. The RST vector is not handled in this manner and always directs the system to the first step of the power-on initialization routine. But what happens if we expand our memory above the lowest 8K block included in the KIM-1 system? Recall that we now must use ABl3, ABT4, and AB15 to decode the additional address locations of the memory. By so doing, the interrupt vector locations are no longer located in the K7 memory block since the decoder (U4) is de-selected in response to the addresses generated by the 6502 array in fetching the interrupt vectors (FFFA for example). We would have the same problem even in an unexpanded system if we wished to use a RST vector and initialization routine different than what the KIM-1 system provides and if the RST vector was to be located in a 1K block lower than K7 (K0 for instance). The solution to this dilemma is to generate logically a special signal for interrupt select. Referring to Figure 6-2, a special signal called "Vector Select" is created to define the highest 1K memory black (K65). The fetch of any interrupt vector will cause this signal to go low "Select". Assuming that the K65 state is not used to select RAM, this signal may be "wire-or'd" with any one of the other "K" signals (K0 to K64) to define exactly which 1K block is to contain the interrupt vectors. 76 As an example, assume that you have connected the K65 "Vector Select" line to the K0 line. When a RST occurs, the 6502 array generates a fetch from locations FFFC and FFFD. These addresses cause K65 to be selected which, in turn, accesses the K0 field of the memory and causes the actual fetch of the RST vector from locations 03FC and 03FD. (Had you chosen to connect K65 to K7, the fetch of the reset vectors would occur from locations 1FFC and 1FFD). In this way, the highest six addresses of any 1K block of memory may be used to supply the interrupt vectors for the system. If desired, a switch could be installed to allow you to select different areas of memory as the source locations for the interrupt vectors. (By the way, we selected the 75145 type decoders in Figure 6-2 specifically to allow the "wire-or" of K65 with any other K. This is possible because the 75145 decoder is provided with open-collector outputs which allows "wire-or" of several states using an external load resistor.) An even simpler arrangement using the "Vector Select" approach is shown in Figure 6-3. Here, the KIM-1 system is assumed to have only the lower 8K of memory in place. The address decoder (U4) is de-selected using the AB15 signal which becomes "true" whenever an interrupt vector fetch is initiated by the system. The same signal (AB15) is inverted and "wire-or'd" through a switch to the K0 or the K7 chip select lines. Now, depending upon the position of the switch, interrupt vectors will be fetched from the top 6 addresses of either block K0 or K7. K0 in the KIM-1 system is the RAM and K7 is the ROM in the 6530-002 array (the operating program). In this way, you may have two different sets of inter- rupt vectors in your system and may select which set is to be used with a simple switch. 77 Vector Selection FIGURE 6.3 78 CHAPTER 7 WARRANTY AND SERVICE Should you experience difficulty with your KIM-1 module and be unable to diagnose or correct the problem, you may return the unit to MOS Technology, Inc. for repair. 7.1 IN-WARRANTY SERVICE All KIM-1 series Microcomputer Modules are warranted by MOS Technology, Inc. against defects in workmanship and materials for a period of ninety (90) days from date of delivery. During the warranty period, MOS Technology, Inc. will repair or, at its option, replace at no charge components that prove to be defective provided that the module is returned, shipping prepaid, to: KIM Customer Service Department MOS Technology, Inc. 950 Rittenhouse Road Norristown, Pennsylvania 19401 This warranty does not apply if the module has been damaged by accident or misuse, or as a result of repairs or modifications made by other than authorized personnel at the above captioned service facility No other warranty is expressed or implied. NOS Technology, Inc. is not liable for consequential damages. 79 7.2 OUT-OF-WARRANTY SERVICE Beyond the ninety (90) day warranty period, KIM modules will be repaired for a reasonable service fee. All service work performed by MOS Technology, Inc. beyond the warranty period is warranted for an additional ninety (90) day period after shipment of the repaired module. 7.3 POLICY ON CHANGES All KIM series modules are sold on the basis of descriptive specifications in effect at the time of sale. MOS Technology, Inc. shall have no obligation to modify or update products once sold. MOS Technology, Inc. reserves the right to make periodic changes or improvements to any KIM series module. 7.4 SHIPPING INSTRUCTIONS It is the customer's responsibility to return the KIM series module with shipping charges prepaid to the above captioned service facility. For in-warranty service, the KIM module will be returned to the customer, shipping prepaid, by the fastest economical carrier. For out-of-warranty service, the customer will pay for shipping charges both ways. The repaired KIM module will be returned to the customer C.O.D. unless the repairs and shipping charges are prepaid by the customer. Please be certain that your KIM module is safely packaged when returning it to the above captioned service facility. 80 APPENDIX A | | | | | | ITEM | PART | QTY. | DESCRIPTION | | | | | | | 1. | Ul | 1 | 6502 Microprocessor | | 2. | U2 | 1 | 6530 ROM RAM I/O Chip-02 | | 3. | U3 | 1 | 6530 ROM RAM I/O Chip-03 | | 4. | U5 through U12 | 8 | 6102 RAM 500ns Acc,0ns | | 5. | U18 through U23 | 6 | 7 SEG .3" Red Display | | 6. | U25 | 1 | 556 Timer IC | | 7. | U27 | 1 | 565 Phase Lock Loop | | 8. | U28 | 1 | 311 Comparator | | 9. | U24 | 1 | 74145 BCD Decoder IC | | 10. | U13 & U14 | 2 | 74125 TRI STATE Buffer | | 11. | u15 | 1 | 7400 Quad Nand IC | | 12. | U16 | 1 | 7404 Hex Inverter IC | | 13. | U17 | 1 | 7406 Hex Inv. O/C IC | | 14. | U26 | 1 | 7438 Quad Nand O/C IC | | 15. | CR1,2,3,4,&8 | 5 | 20 mA. 50v Diode - 1N914 | | 16. | CR5, CR6 | 2 | 1A 50v Diode - 1N4001 | | 17. | CR7 | 1 | 6.2v ½w Z. Diode - 1N4735 | | 18. | Q7 | 1 | NPN Transistor B>20, VCE>12 - 2N5371 | | 19. | Q1 through Q6 | 6 | PNP Transistor B>20, VCE>6 - 2N5375 | | 20. | 04 & 05 | 2 | 47K ±10% ¼w Resistor | | 21. | R1,2,3,4, & 6 | 5 | 3.3K ±10% ¼w Resistor | | 22. | R34 & P50 | 2 | 2.2K ±10% ¼w Resistor | | 23. | Rl2-R17, R41-R46 | 12 | l.0K ±10% ¼w Resistor | | 24. | R35 through R40 | 6 | 560Ohm ±10% ¼w Resistor | | 25. | R18-R23, R47 | 7 | 220Ohm ±10% ¼w Resistor | | 26. | R33 | 1 | 47Ohm ±l0% ¼w Resistor | | 27. | R52 | 1 | 5 Meg. ±10% ¼w Resistor | | 28. | R51 | 1 | 30K ±5% ¼w Resistor | | 29. | R7,R8,R9,R10&R1l | 5 | l0K ±5% 1/4w Resistor | | 30. | R48, R49 | 2 | 150 ±5% 0 | | 31. | R26 through R32 | 7 | 82Ohm ±05% | | 32. | VR1 | 1 | 5K Potentiometer | | 33. | C2, C3, C6 | 3 | .22±10% uf.>12 wv. cap | | 34. | C1, C4 | 2 | 1uf+80-l0%>12WV Cap | | 35. | CS | 1 | .33 uf±l0%>12WV Cap | | 36. | C7,C8,C15,C16,C17 | 5 | .1uf+80-l0%>12WV Cap | | 37 | C9, C10, C11 | 3 | .0068uf±l0%>l2WV | | 38. | C12 | 1 | .047uf±1O%>l2WV | | 39. | C13 | 1 | .022uf±10%>l2WV | | 40. | C14 | 1 | .OOluf±lO%>l2WV | | 41. | | 1 | 44 Pin Edge Conn. (Vector #R644) | | 42. | X1 | 1 | 1 MHz XTAL | | 43. | | 1 | PCB. | | 44. | | 1 | 24 Key KBD | | 45. | | 6 | Rubber Pads | | 46. | | 1 | Shipping Bag (Static Free) | | 47. | | 1 | Shipping Box | | 48. | | 1 | Hardware Manual | | 49. | | 1 | Software Manual | | 50. | | 1 | KIM Manual | | 51. | | 1 | Warranty Card | | 52. | | 1 | Wall Chart | | 53. | | 2 | #2 x ¼ SS Screws (Keyboard) | | 54. | | 1 | Program Card | | 55. | C18 | 1 | 10pf CAP | | 56. | R53 | 1 | 330K ¼w Resistor | | 57. | U4 | 1 | 74L5145 BCD Decoder lC | A-1 APPENDIX B KIM-1 PARTS LAYOUT B-1 APPENDIX C IN CASE OF TROUBLE SYMPTOM: Display Not Lit 1. Test +5 volt power supply. Using a VOM check for +5 volts between Pin E-21 and E-22. Also check for +5 volts between Pin A-A and Pin A-1. KIM-1 power supply should be set at +5v ñ 5%. 2. Test KB/TTY option wiring (Figure 2-4). Pin A-21 should not be connected to Pin A-V. 3. Make sure decoder is enabled. See Figure 2-2 and insure that Pin A-K is connected to ground. 4. Depress the reset key and check all other keys to insure that no key is stuck. 5. Place a VOM between Pin E-21 (+5v) and Pin E-7 (Reset). Alternately depress and release the reset key checking to see if the voltage swings from (>4v) to (<1v). 6. Test Pin E-V (è2) with an oscilloscope and insure 1 MHz operation. SYMPTOM: Cannot Dump to Audio Tape Cannot Load From Audio Tape 1. Test +12 volt power supply. Using a VOM check for +12 volts between Pin A-N (+12v) and Pin A-1 (GND). Set power supply to +12v ñ 5%. (See Figure 2-2). 2. Check volume control on the tape recorder (Set at half way point). C-1 3. Make sure that you are using the proper tape output pin. See Figure 2-3. 4. Check the tape interface circuit by disconnecting the tape recorder and shorting Pin A-P (Audio Out High) to Pin A-L (Audio In). Set up KIM-1 monitor to dump a section of memory. Using an oscilloscope observe data at Pin E-X (PLL TEST). See Appendix E for correct data format and calibration procedure. 5. Record voice on a section of tape and play it back to insure that the tape recorder is working. Connect another tape recorder to the system or try another cassette. 6. Make sure Status Register (Location 00F1) has been loaded with data value "00". 7. Make sure Tone Control is set to High. SYMPTOM: TTY Interface Problems 1. Make sure that Pin A-21 is connected to Pin A-V (Figure 2-4) to allow TTY operation. 2. Compare the connections on Figure 2-4 with interface schematics in your TTY manual ( or any other serial teleprinter ). 3. Depress the reset key on the KIM-1 keyboard followed by a rub out cha